chain. When the first Nv in the chain receives a process, it then passes the process to the next Nv, which passes it on down the chain. Sort of a neuron pass-the-process relay race. (Yes, this was written during the Olympics.)

In the last article, we saw how a single Nv can be made to fire in response to light. Now, we can see how the processes from a single Nv can be fed into an entire chain of Nvs. The output of each Nv provides the trigger for the next, but each output can be used to control something else. The result is a sequence of events with variable timing. A process fires off and runs until the end of the chain, where it falls off.

What if we want to keep the process running? Well, picture the Nv chain as a string. By tying the string together in a loop, a process started at any Nv will continue around the chain. Connect the last Nv's output back to the first Nv's input. Looped Nervous Nets are said to be in a core topology.

Wow, we are learning a lot! Now, we can say, "My CPG uses four Nvs in a core topology, branching into three Nvs in a chain topology." Whew, that's a lot to write, let alone to say.

In a shorthand notation, we use the numeric prefix (bi-, quad-, etc.) to mark how many neurons are in a Nervous Net. Then, we state the topology in the root. So, for chains of Nvs, we write Bichain, Trichain, or Quadchain for links of two, three, or four. The same goes for cores, where we have Bicores, Tricores, and Quadcores.

Step 1: Playing With Chains

Pull out your breadboard. Take a 74AC240 or 74HC240. Choose the resistor and capacitor values at random, providing that you have four matched pairs. You'll want the time-out to be long enough to be observable without being so long as to be unbearable. Caps around 0.1 |F or 0.22 |F and resistors in the 1M to 5M range work well.

Plug in the '240 and run the ground lines to pins 1, 10, and 19. Put the first Nv - Nv (2, 18) - on the breadboard along with the PIC, as shown in Figure 6. Ground the remaining inputs. Add power and test with a PIC switch (Figure 5). The neuron should go active and then time-out.

Remove the ground from pin 4 and build Nv (4, 16). Place Nv (4, 16)'s capacitor across the channel. Plug it into pin 4 and Nv (2, 18)'s output. When you

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